Display panel and method of testing display panel
US11341878B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2020 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Mar 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of testing a display panel including a pixel coupled to first, second, and third power lines, a data line, scan lines, an emission control line, and a test line, the method includes: applying a first power supply voltage to the first power line; applying a test voltage having a turn-on voltage level to the second power line; applying a scan signal having a turn-on voltage level sequentially to the scan lines and an emission control signal having a turn-on voltage level to the emission control line; applying a gate signal to the test line to turn on a test transistor coupled between two electrode of a light emitting element included in the pixel; measuring a sensing voltage output through the data line; and determining whether the pixel is defective, based on a voltage level of the measured sensing voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.