Data driving circuit for reducing power consumption, driving chip and display device
US11341884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2020 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Aug 26, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Provided is a data driving circuit, including: a pixel current generation circuit including an input terminal and an output terminal and configured to generate a pixel current based on a data voltage inputted via the input terminal, wherein the output terminal of the pixel current generation circuit is configured to be connected to a pixel circuit; and a first operational amplifier including a first input terminal connected to the output terminal of the pixel current generation circuit, a second input terminal, and an output terminal. A first voltage is inputted via the second input terminal of the first operational amplifier and is positively related to the data voltage, and the output terminal of the first operational amplifier is configured to be connected to the pixel circuit; and wherein the first operational amplifier is configured to generate a bias current based on the first voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.