Semiconductor devices and method of manufacturing the same
US11342415B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2020 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Oct 30, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device, includes: gate electrodes spaced apart from each other and on a substrate; channel structures penetrating the gate electrodes, each of channel structures including a channel layer, a gate dielectric layer between the channel layer and the gate electrodes, a channel insulating layer filling between the channel layers, a channel pad on the channel insulating layer; and separation regions penetrating the gate electrodes, and spaced apart from each other, wherein the gate dielectric layer extends upwardly, further than the channel layer upwardly such that a portion of an inner side surface of the gate dielectric layer contacts the channel pad, the channel pad includes a lower pad on an upper end of the channel layer and the inner side surface of the gate dielectric layer, and having a first recess between the inner side surfaces of the gate dielectric layer; and an upper pad having a first portion in the first recess and a second portion extending from the first portion in a direction, parallel to an upper surface of the substrate on the first portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.