Method of fabricating and method of using porous wafer battery
US11342625B2 · kind B2 · utility
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3References
15Claims
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Key dates
| Filing date | Nov 2, 2020 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Feb 4, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a porous wafer battery comprises the steps of providing a silicon wafer comprising a plurality of pores; applying a first metallization process; applying a passivation process; applying solder balls, aligning the silicon wafer with a substance, and applying a solder reflow process. A method using a porous wafer battery comprises the steps of connecting the porous wafer battery to a plurality of sensors, a plurality of switches, and a battery management system; monitoring temperature, resistance, or current; and electrically disconnecting a non-properly functioning pore.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.