Detection circuit, corresponding device and method
US11342885B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2019 |
| Grant date | May 24, 2022 |
| Priority date | — |
| Expiry date | Jul 22, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one example, a circuit includes a first node to receive an analog signal that is an amplitude modulated radio-frequency signal for a digital signal. An output node is configured to provide an output signal indicative of rising and falling edges of an envelope of the analog signal. The rising and falling edges are indicative of rising and falling edges of the digital signal. A first current path is disposed between a power supply node and the first node. The first current path includes a first transistor coupled between the first node and a first bias source. The first bias source is coupled between the first transistor and the power supply node. The output node is coupled to a first intermediate node in the first current path between the transistor and the first bias source. A control terminal of the first transistor is coupled to the output node via a feedback network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.