Array substrate, method for fabricating the same, and display device
US11347334B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 4, 2018 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Mar 19, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04103
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array substrate, a method for fabricating the same, and a display device are provided. The array substrate includes: a base substrate; touch electrode wiring including a first conductive layer and a second conductive layer, where the first conductive layer is between the base substrate and the second conductive layer, the second conductive layer includes at least one first via hole to expose the first conductive layer, and the first conductive layer has a higher electrical conductivity than that of the second conductive layer; a planarization layer on the second conductive layer, where the planarization layer includes at least one first touch electrode contact hole; and touch electrode on the planarization layer, where the touch electrode is connected with the first conductive layer through the first touch electrode contact hole and the first via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.