Method of manufacturing a semiconductor device
US11348913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2020 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Apr 14, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate including a first region and a second region, memory transistors on the first region, a first interconnection layer on the memory transistors and including first interconnection lines, and a second interconnection layer on the first interconnection layer and including second interconnection lines. The second interconnection lines on the first region include a first line extending along a first direction and spaced from the second region by a first distance along the first direction, and a second line extending along the first direction, spaced from the first line along a second direction intersecting the first direction, and having a width smaller than that of the first line. The first line includes a protrusion extending along a third direction toward the substrate. The protrusion is spaced from the second region by a second distance along the first direction greater than the first distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.