Semiconductor memory device
US11348924B2 · kind B2 · utility
1Cited by
18References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2020 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Jul 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device may include a bit line extending in a first direction, a first conductive pattern extending in a second direction intersecting the first direction, a semiconductor pattern connecting the bit line and the first conductive pattern, a second conductive pattern including an insertion portion in the first conductive pattern, and a dielectric layer between the first conductive pattern and the second conductive pattern. The insertion portion of the second conductive pattern may have a width which increases as a distance from the semiconductor pattern increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.