Laminated electronic component and method for manufacturing laminated electronic component
US11349449B2 · kind B2 · utility
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16Claims
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Key dates
| Filing date | Jan 8, 2021 |
| Grant date | May 31, 2022 |
| Priority date | — |
| Expiry date | Jan 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H2001/0085
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Provided is a laminated electronic component in which defective formation is unlikely to cause in a shield conductor layer on a side surface of a laminate. The laminated electronic component includes a laminate 1, in which substrate layers 1a to 1i are laminated, having an outer surface including a first main surface 1B, a second main surface 1T, and a side surface 1S, internal electrodes (a ground electrode 2, coil electrodes 3, capacitor electrodes 4, and wiring electrodes 5), an external electrode 7, and a first plating layer 9 formed on a surface of the external electrode 7.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.