Methods to reduce power consumption of an optical particle sensor via an ASIC design
US11353390B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2019 |
| Grant date | Jun 7, 2022 |
| Priority date | — |
| Expiry date | Dec 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/145
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A portable communication device includes one or more optical detectors to generate an analog signal in response to a change in an intra-cavity or an emitted optical power of a light source due to light backscattered from a particle and an application-specific integrated circuit (ASIC). The particle is illuminated via a light source. The ASIC includes an analog-to-digital converter (ADC) circuit, a digital delay circuit, a particle detector module and a processor. The ADC converts the analog signal to a digital signal. The digital delay circuit can store the digital signal for a predetermined or dynamically variable time interval. The particle detector module can analyze the digital signal and can generate an enable signal upon detecting a particle signature in the digital signal. The processor is coupled to the digital delay circuit and can start processing the digital signal in response to the enable signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.