Host, system and method for facilitating debugging in booting
US11354210B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2020 |
| Grant date | Jun 7, 2022 |
| Priority date | — |
| Expiry date | Feb 18, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/321
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a host and a display. The host includes a programmable logic device (PIP), a baseboard management controller (BMC) and a switch. The PLD performs a power-on procedure based on a power-on sequence code, generates variable character information in the power-on procedure, and fills the variable character information into a variable field in a preset log text file to result in an updated log text file. When it is determined that the power-on procedure is not normally completed, the PLD controls the switch to switch to a debug mode, and transmits a video signal containing debug information corresponding to the updated log text file to the switch so that the video signal is outputted to the display.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.