Patent · US Active

Simulation environment for efficient assessment of memory-bound platforms

US11354771B1 · kind B1 · utility

2Cited by
1References
20Claims
0Family size

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Key dates

Filing dateJun 3, 2021
Grant dateJun 7, 2022
Priority date
Expiry dateJun 3, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5066
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods, systems, and computer-readable storage media for providing a simulated graph processing accelerator representative of a hardware-based graph processing accelerator, the simulated graph processing accelerator including a controller component, a set of producer components, and a final merge component; triggering execution of the simulated graph processing accelerator as a simulation of processing of a graph for one or more of breadth-first search (BFS), single source shortest path (SSSP), weakly connected components (WCC), sparse matrix-vector multiplication (SpMV), and PageRank (PR), execution including: generating request streams from each producer component, merging request streams to provide a merged request stream, inputting the merged request stream to a memory simulator, and processing, by the memory simulator, the merged request stream to simulate handling of requests in memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.