Method and apparatus for a neural network
US11354888B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2018 |
| Grant date | Jun 7, 2022 |
| Priority date | — |
| Expiry date | Apr 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/045
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signal processing system includes a central processing unit (CPU) in communication with an accelerator, and an instruction scheduler in communication with the accelerator. A first memory device including a first instruction set is configured to operate the accelerator, a second instruction set is configured to operate the CPU, and a second memory device is configured to receive a datafile. The accelerator includes a plurality of processing engines (PEs) and an instruction scheduler, the instruction set includes a plurality of operators, and the instruction scheduler is configured to implement the operators in the accelerator employing the PEs. The CPU employs the operators implemented in the accelerator to analyze the datafile to extract a feature therefrom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.