Voltage-to-time converter architecture for time-domain analog-to-digital converter
US11356110B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2021 |
| Grant date | Jun 7, 2022 |
| Priority date | — |
| Expiry date | May 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage-to-time converter (VTC) for a time-domain analog-to-digital converter is disclosed, which provides a time-domain analog-to-digital converter (T-ADC) with low power consumption and high precision. By combining the advantages of current-starving technology, current mirror technology, and body biasing technology, compared with the traditional structure, the VTC and T-ADC achieve excellent performance, such as low power consumption, high linearity, wide input dynamic range, and strong anti-interference to PVT variations. Compared with the traditional voltage-to-time converter, the disclosed voltage-to-time converter has a wider input dynamic range and higher linearity. The input voltage is connected to transistors in the circuit as a body bias, resulting in a very small body current, and no apparent increase in power consumption. The design of a low-power voltage-to-time converter is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.