Patent · US Active

Self calibrating digital-to-analog converter

US11356111B1 · kind B1 · utility

1Cited by
3References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 11, 2021
Grant dateJun 7, 2022
Priority date
Expiry dateMar 11, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04B1/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A self-calibrating digital-to-analog converter (DAC) is disclosed. The self-calibrating DAC includes an input port, a non-binary DAC, an ADC to receive an output of the non-binary DAC, a lookup table to store a plurality of calibration code and a calibration logic coupled with the non-binary DAC. The self-calibrating DAC has two modes of operations, a calibration mode and a normal operational mode. In the calibration mode, the self-calibrating DAC is configured to calculate weightages of the non-binary DAC and to calculate an offset coefficient and a gain coefficients using high precision on chip analog-to-digital converter (ADC).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.