Method and apparatus for sending and receiving clock synchronization packet
US11356188B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2020 |
| Grant date | Jun 7, 2022 |
| Priority date | — |
| Expiry date | Aug 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/0085
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
This application provides a method for sending and receiving a clock synchronization packet in FlexE. The method includes: generating, by a sending apparatus, indication information and a plurality of data blocks, where the plurality of data blocks are obtained by encoding a first clock synchronization packet, the indication information is used to indicate a first data block, and the first data block is a data block used for timestamp sampling in the plurality of data blocks; determining, by the sending apparatus, according to the indication information, a moment at which the first data block arrives at a medium dependent interface MDI of the sending apparatus, and generating a sending timestamp, where the sending timestamp is used to record a sending moment of the first clock synchronization packet; generating a second clock synchronization packet carrying the sending timestamp; and sending, by the sending apparatus, the second clock synchronization packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.