Array substrate motherboard and display panel moiherboard
US11360361B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Dec 25, 2019 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Apr 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/441
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate motherboard includes a plurality of array substrates and a plurality of connection lines. Each of the plurality of array substrates includes an electrical test region, and the electrical test region includes a first conductive terminal. The plurality of connection lines are electrically connected to first conductive terminals of electrical test regions of the plurality of array substrates to electrically connect the plurality of array substrates together.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.