Systems, methods, and apparatuses for zeroing a matrix
US11360770B2 · kind B2 · utility
5Cited by
85References
20Claims
0Family size
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Key dates
| Filing date | Jul 1, 2017 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Jul 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments detailed herein relate to matrix operations. In particular, performing a matrix operation of zeroing a matrix in response to a single instruction. For example, a processor detailed which includes decode circuitry to decode an instruction having fields for an opcode and a source/destination matrix operand identifier; and execution circuitry to execute the decoded instruction to zero each data element of the identified source/destination matrix.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.