Multithreaded processor core with hardware-assisted task scheduling

US11360809B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• William P. Griffin, Jr. · Pittsburgh, US
• Joshua B. Fryman · Corvallis, US
• Jason Howard · Portland, US
• Sang Phill Park · Sammamish, US
• Robert Pawlowski · Beaverton, US
• Michael D. Abbott · Shelburne, US
• Scott Cline · Beaverton, US
• Samkit Jain · Hillsboro, US
• Ankit More · San Mateo, US
• Vincent Cave · Hillsboro, US
• Fabrizio Petrini · Palo Alto, US
• Ivan B. Ganev · Hillsboro, US

Key dates

• Filing date: Jun 29, 2018
• Grant date: Jun 14, 2022
• Expiry date: Nov 12, 2038

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Embodiments of apparatuses, methods, and systems for scheduling tasks to hardware threads are described. In an embodiment, a processor includes a multiple hardware threads and a task manager. The task manager is to issue a task to a hardware thread. The task manager includes a hardware task queue to store a descriptor for the task. The descriptor is to include a field to store a value to indicate whether the task is a single task, a collection of iterative tasks, and a linked list of tasks.