Inter-device processing system with cache coherency
US11360906B2 · kind B2 · utility
9Cited by
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20Claims
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Key dates
| Filing date | Aug 14, 2020 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Dec 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The devices within an inter-device processing system maintain data coherency in the last level caches of the system as a cache line of data is shared between the devices by utilizing a directory in one of the devices that tracks the coherency protocol states of the memory addresses in the last level caches of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.