Gate driving unit including four clock signals, gate driving method, gate driving circuit, display panel and display device
US11361703B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Apr 7, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driving unit, a gate driving method, a gate driving circuit, a display panel and a display device are provided. The gate driving unit includes a start terminal, a first gate driving signal output terminal, a second gate driving signal output terminal, a pull-up control node control circuit, a pull-up node control circuit, configured to control a potential of a first pull-up node and a potential of a second pull-up node based on the potential of the pull-up control node, a first gate driving signal output circuit, a second gate driving signal output circuit, and a pull-down node control circuit, configured to control and maintain the potential of the pull-down node under the control of a third clock signal and a fourth clock signal, and control to reset the potential of the pull-down node under the control of the potential of the pull-up control node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.