Multi-chip packing structure employing millimeter wave
US11362050B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2020 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Apr 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-chip packaging structure employing millimeter wave includes a substrate material, a first and a second substrate board and an adhesive layer. The substrate material has a first metal pad. The first substrate board has a first and a second integrated circuit, multiple first metal wirings and multiple second metal pads, which are layer-by-layer stacked and electrically connected. The first and second metal pads are electrically connected via at least one metal lead. The adhesive layer is disposed between the substrate material and the first substrate board. The second substrate board has a third and a fourth integrated circuit, multiple second metal wirings and multiple third metal pads, which are layer-by-layer stacked and electrically connected. The electro-conductive boss blocks are respectively electrically connected with the second and third metal pads. Chips and antennas are integrated to integrate signal height and avoid interference and minify the volume.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.