Partial RMS based over-current detection for VDT excitation
US11362508B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 20, 2021 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Apr 20, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/08
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
System and methods for partial RMS calculation of overcurrent in VDT driver circuits are provided. Aspects include sampling, by an FPGA, a set of current values from a sense resistor, wherein the sense resistor is coupled between a driver circuit and a VDT, determining, by the FPGA, an overcurrent event in the driver circuit based on the set of current values, wherein determining the overcurrent event in the driver circuit based on the set of current values includes trimming each current value to create a trimmed current value for each current value, calculating a square value for each trimmed current value and storing the square value in a buffer, calculating a mean for the square values, and determining the overcurrent event based on the mean being outside a predefined range of means, and disabling the driver circuit based on the determination of the overcurrent event.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.