Track and hold circuit
US11362669B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Jun 14, 2022 |
| Priority date | — |
| Expiry date | Apr 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45722
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is a track-and-hold circuit capable of reducing the power consumption of a differential amplifier circuit while preserving the broadband nature (without narrowing the bandwidth). In the track-and-hold circuit 1 including a differential amplifier circuit 10, a switch circuit 20, and a hold capacitor C21, the differential amplifier circuit 10 includes a first resistor R11 having one end connected to a collector electrode of a first transistor Q11 constituting a differential pair, a second resistor R12 having one end connected to the collector electrode of a second transistor Q12 constituting the differential pair, and a third resistor R13 to which the other end of the first resistor R11 and the other end of the second resistor R12 are connected and which is connected between the other ends and a power supply VCC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.