Addressable vertical nanowire probe arrays and fabrication methods
US11363979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2017 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Oct 20, 2039 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/035
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A nanowire probe sensor array including a substrate with a metal pattern thereon. An array of semiconductor vertical nanowire probes extends away from the substrate, and at least some of probes, and preferably all, are individually electrically addressed through the metal pattern. The metal pattern is insulated with dielectric, and base and stem portions of the nanowires are also preferably insulated. A fabrication process patterns metal connections on a substrate. A semiconductor substrate is bonded to the metal pattern. The semiconductor substrate is etched to form the neural nanowire probes that are bonded to the metal pattern. Dielectric is then deposited to insulate the metal pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.