Selectors for memory elements
US11364717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2021 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Nov 9, 2041 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB41J2202/17
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
In some examples, a circuit includes a data line, an input line, a first memory element, and a decoder to receive an address and to enable the first memory element for access in response to the address. The selector is responsive to the data line to select the first memory element, where the selector is to select the first memory element responsive to the data line having a first value, and where the data line is to communicate data of a second memory element in response to the second memory element being enabled for access. The input line is to communicate data of the first memory element in response to the first memory element being selected by the selector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.