Method and device for matrix multiplication optimization using vector registers
US11366875B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Mar 13, 2020 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | May 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/082
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and devices, the method including receiving a matrix of a neural network model; classifying at least a portion of the matrix as a first section based on a first distribution pattern of non-zero elements of the portion of the matrix; and identifying memory addresses of the non-zero elements in the first section of the matrix for loading, according to a first order determined based on the first distribution pattern, the non-zero elements in the first section into one or more vector registers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.