Shift register unit circuit and driving method, shift register, gate drive circuit, and display apparatus
US11367469B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 9, 2017 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Jan 15, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit circuit includes an input sub-circuit, a pull-up sub-circuit, a pull-down control sub-circuit, a pull-down sub-circuit, and a voltage regulating sub-circuit. The input sub-circuit receives an input signal from a signal input terminal to control a potential of a pull-up node. The pull-up sub-circuit outputs a gate driving signal to an output terminal under control of the potential of the pull-up node and a signal from a first signal terminal. The pull-down control sub-circuit conducts a pull-down node with a first node under control of a signal from the second signal terminal. The pull-down sub-circuit conducts the pull-up node with the first node and the turn-down signal terminal with the output terminal under control of a potential of the pull-down node. The voltage regulating sub-circuit conducts the first node with the turn-down signal terminal under control of a potential of the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.