Analog interleavers
US11368164B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 11, 2019 |
| Grant date | Jun 21, 2022 |
| Priority date | — |
| Expiry date | Oct 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An interleaver for combining at least two incoming signals into an analog output signal includes at least a first signal path and a second signal path. Each signal path has: an input terminal, a first gain stage for multiplying a signal coming from the input terminal with a first gain (a) to obtain a first signal, a mixer and a second gain stage for multiplying a signal coming from the input terminal with a second gain (b) before or after mixing it with a clock signal to obtain a second signal, an adder for adding the first and second signal to obtain an output signal of the signal path wherein the first and second gain are different from zero. The interleaver comprises an adder for adding the output signals from the signal paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.