Patent · US Active

Invalidation data area for cache

US11372771B2 · kind B2 · utility

0Cited by
1References
17Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 12, 2020
Grant dateJun 28, 2022
Priority date
Expiry dateOct 12, 2040

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/62
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present disclosure relates to caches, methods, and systems for using an invalidation data area. The cache can include a journal configured for tracking data blocks, and an invalidation data area configured for tracking invalidated data blocks associated with the data blocks tracked in the journal. The invalidation data area can be on a separate cache region from the journal. A method for invalidating a cache block can include determining a journal block tracking a memory address associated with a received write operation. The method can also include determining a mapped journal block based on the journal block and on an invalidation record. The method can also include determining whether write operations are outstanding. If so, the method can include aggregating the outstanding write operations and performing a single write operation based on the aggregated write operations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.