Silicon-controlled-rectifier electrostatic protection structure and fabrication method thereof
US11373996B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 19, 2020 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | Apr 1, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A silicon-controlled-rectifier electrostatic protection structure and a fabrication method are provided. The structure includes: a substrate of P-type; a first N-type well, a second N-type well, and a third N-type well in the substrate; a first P-type doped region in the first N-type well; first N-type doped regions at sides of the first N-type well along a first direction; first gate structures on a portion of the first N-type doped regions and on a portion of the first P-type doped region; second gate structure groups at sides of the first N-type well along a second direction; second N-type doped regions in the substrate at sides of each second gate structure along the first direction; second P-type doped regions in the second N-type doped regions between adjacent second gate structure groups; and a third P-type doped region and a cathode N-type doped region in the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.