Array substrate, display panel, and display device
US11374032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2019 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | May 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0297
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
There is provided an array substrate including a plurality of pixel regions arranged in rows and columns. The plurality of pixel regions include a corresponding pixel electrode array and a corresponding pixel circuit associated with the corresponding pixel electrode array. Each of the pixel electrode arrays is arranged in rows and columns, and each pixel electrode array includes a plurality of pixel electrodes arranged in an array. The array substrate further includes a plurality of sets of gate lines extending in a row direction and a plurality of sets of data lines extending in a column direction. The plurality of sets of gate lines and rows of the pixel electrode arrays are alternately arranged with each other in the column direction. The plurality of sets of data lines and columns of the pixel regions are alternately arranged with each other in the row direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.