Gate structure and photomask of NAND memory and method for making the same

US11374103B2 · kind B2 · utility

Assignee

• Shanghai Huali Microelectronics Corporation · CN

Inventors

• Pengkai Xu · Shanghai, CN
• Fulong Qiao · Shanghai, CN
• Yi Wang · Kaohsiung, TW

Key dates

• Filing date: Apr 1, 2020
• Grant date: Jun 28, 2022
• Expiry date: Apr 1, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

A method for forming the gate structure of the NAND memory, comprising the steps of disposing a gate structure layer, a pattern transfer layer, a TEOS structure, and an organic dielectric Tri-Layer on a substrate sequentially; performing a patterning using a first photomask and a first photoresist layer; performing an etching process to form a control gate structure, a peripheral gate structure and a select gate structure; performing a trimming process to them; patterning sidewalls on sides of them; performing a second patterning using a second photomask as a mask and a second photoresist layer to protect the peripheral gate structure, the select gate structure, and their sidewalls; removing the control gate structure between its sidewalls; performing etching by using the sidewalls, the peripheral gate structure and the select gate structure as masks to form the control gate, the peripheral gate, and the select gate.