Circuits for identifying interferers using compressed-sampling
US11374599B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 23, 2017 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | Oct 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/16
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Circuits for identifying interferers using compressed-sampling, comprising: a low noise amplifier (LNA); a passive mixer having a first input coupled to an output of the LNA; a local oscillator (LO) source having an output coupled to a second input of the passive mixer; a low pass filter having an input coupled to an output of the passive mixer; an analog-to-digital converter (ADC) having an input coupled to the output of the low pass filter; a digital baseband (DBB) circuit having an input coupled to an output of the ADC; and a compression-sampling digital-signal-processor (DSP) having an input coupled to the output of the DBB circuit, wherein the compression-sampling DSP is configured to output identifiers of frequency locations of interferers, wherein, in a first mode, the LO source outputs a modulated LO signal that is formed by modulating an LO signal with a pseudo-random sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.