System, apparatus and method for mitigating digital interference within radio frequency circuitry
US11374600B1 · kind B1 · utility
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2References
20Claims
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Key dates
| Filing date | Jan 28, 2021 |
| Grant date | Jun 28, 2022 |
| Priority date | — |
| Expiry date | Jan 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one example, an apparatus includes: a radio frequency (RF) receiver to receive an RF signal; a media access control (MAC) circuit to receive data and output MAC-processed data according to a clock signal that is phase delayed with respect to a source clock signal when the RF receiver is active; and an interference mitigation circuit to receive the MAC-processed data and provide the MAC-processed data to a physical circuit resynchronized to the source clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.