Determining critical timing paths in a superconducting circuit design
US11380835B2 · kind B2 · utility
2Cited by
9References
20Claims
0Family size
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Key dates
| Filing date | Jul 22, 2019 |
| Grant date | Jul 5, 2022 |
| Priority date | — |
| Expiry date | Dec 14, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for determining critical timing paths in a superconducting circuit design including Josephson junctions are provided. An example method includes providing timing information concerning a plurality of source terminals of at least one logic gate coupled with a first sink terminal of the at least one logic gate. The method further includes using a processor, determining whether, in view of the timing information, the first sink terminal is reachable by a single flux quantum (SFQ) pulse within a predetermined range of arrival time based on an assigned first phase to the at least one logic gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.