Vertical layered finite alphabet iterative decoding
US11381255B2 · kind B2 · utility
2Cited by
16References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 6, 2020 |
| Grant date | Jul 5, 2022 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0054
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This invention presents a method and apparatus for vertical layered finite alphabet iterative decoding of low-density parity-check codes (LDPC) which operate on parity check matrices that consist of blocks of sub-matrices. The iterative decoding involves passing messages between variable nodes and check nodes of the Tanner graph that associated with one or more sub-matrices constitute decoding blocks, and the messages belong to a finite alphabet. Various embodiments for the method and apparatus of the invention are presented that can achieve very high throughputs with low hardware resource usage and power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.