Semiconductor devices and related methods
US11383970B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 9, 2019 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | Jul 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
In one example, an electronic device can comprise (a) a first substrate comprising a first encapsulant extending from the first substrate bottom side to the first substrate top side, and a first substrate interconnect extending from the substrate bottom side to the substrate top side and coated by the first encapsulant, (b) a first electronic component embedded in the first substrate and comprising a first component sidewall coated by the first encapsulant, (c) a second electronic component coupled to the first substrate top side, (d) a first internal interconnect coupling the second electronic component to the first substrate interconnect, and (e) a cover structure on the first substrate and covering the second component sidewall and the first internal interconnect. Other examples and related methods are also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.