False hit detection in ternary content-addressable memory
US11386008B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2020 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | Sep 11, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory apparatus for detecting false hits in a content-addressable memory (CAM) is disclosed. The memory apparatus includes a controller coupled to the CAM and a memory. The controller receives a search result including an address from the CAM, the address corresponding to a matching entry from a first set of data entries that matches a search tag. The controller provides a read address based on the address to the memory, which returns a second data entry from a second set of data entries corresponding to the read address. The controller receives the read data and generates an error detection result based on a comparison between the second data entry and the search tag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.