Pixel-level background light subtraction
US11387266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2019 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | Dec 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/807
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A pixel circuit, a method for performing a pixel-level background light subtraction, and an imaging device are disclosed. In one example of the present disclosure, the pixel circuit includes an overflow gate transistor, a photodiode, and two taps. Each tap of the two taps is configured to store a background signal that is integrated by the photodiode, subtract the background signal from a floating diffusion, store a combined signal that is integrated by the photodiode at the floating diffusion, and generate a demodulated signal based on a subtraction of the background signal from the floating diffusion and a storage of the combined signal that is integrated at the floating diffusion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.