High speed switching solid state relay circuit
US11387827B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2021 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | Feb 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M5/2937
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.