Methods and apparatus to implement pulse swallowing circuitry in a phase frequency detector
US11387834B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 13, 2021 |
| Grant date | Jul 12, 2022 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1803
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An example apparatus includes: a first flip flop having a first output and a first reset input, a second flip flop having a first data input, a second output, and a second reset input, the second reset input coupled to the first reset input, a logic gate having a first logic input, a second logic input, and a first logic output, the first logic input coupled to the first output and the second logic input coupled to the second output, a delay cell having a delay cell input and a delay cell output, the delay cell input coupled to the first logic output and the delay cell output coupled to the first reset input and the second reset input, and pulse swallowing circuitry having a circuitry input and a circuitry output, the circuitry input coupled to the second output and the circuitry output coupled to the first data input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.