Hardware multiple cipher engine

US11387980B2 · kind B2 · utility

Assignee

• Nordic Semiconductor ASA · NO

Inventors

• Veli-Pekka Junttila · Oulu, FI
• Harri Matomäki · Oulu, FI
• James NEVALA · Trondheim, NO
• Matti Tiikkainen · Trondheim, NO
• Markku Vähätaini · Trondheim, NO
• Marko Winblad · Trondheim, NO

Key dates

• Filing date: Dec 13, 2018
• Grant date: Jul 12, 2022
• Expiry date: Jun 9, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L2209/24
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

A hardware cipher engine encrypts or decrypts a block of input data from a sequence of blocks using a cipher operation where the block of output data depends on the input block's position in the sequence. In a random-access mode of operation, the engine receives a sequence position, receives a block of input data having that position, and outputs a block of output data without outputting data that encrypts, or that decrypts, every block of input data preceding the received position. In some embodiments, the operation is a stream cipher, and the engine generates a sequence of keystream blocks and performs a combining operation between the input block and a keystream block having a corresponding sequence position. In other embodiments, the cipher operation is a block cipher, and the engine generates, but doesn't output, blocks of data that encrypt, or decrypt, one or more blocks preceding the received input block.