High speed data packet flow processing
US11392317B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 21, 2020 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Apr 21, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment may involve a network interface configured to capture data packets into a binary format and a non-volatile memory configured to temporarily store the data packets received by way of the network interface. The embodiment may also involve a first array of processing elements each configured to independently and asynchronously: (i) read a chunk of data packets from the non-volatile memory, (ii) identify flows of data packets within the chunk, and (iii) generate flow representations for the flows. The embodiment may also involve a second array of processing elements configured to: (i) receive the flow representations from the first array of processing elements, (ii) identify and aggregate common flows across the flow representations into an aggregated flow representation, (iii) based on a filter specification, remove one or more of the flows from the aggregated flow representation, and (iv) write information from the aggregated flow representation to the database.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.