Memory controller, memory device, and storage device
US11393551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2021 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Jul 15, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device may determine cell count information from a threshold voltage distribution of memory cells and may determine a detection case based on cell count information when correction of an error in read data, received from the memory device performing a read operation, fails. The memory controller may control the memory device to perform a read operation using a development time determined in consideration of an offset voltage of a read voltage corresponding to the detection case. When correction of the error in the read data fails again, the memory controller may control the memory device to perform a read operation using a corrected read voltage generated using a dynamic offset voltage obtained by inputting the cell count information to a machine learning model.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.