Interconnection structure of integrated circuit semiconductor device
US11393753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2020 |
| Grant date | Jul 19, 2022 |
| Priority date | — |
| Expiry date | Aug 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnection structure of an integrated circuit semiconductor device includes: a first conductive layer on a semiconductor substrate; an interlayer insulating layer on the first conductive layer and including a trench and a via hole; a via layer in the via hole, the via layer penetrating the interlayer insulating layer through a bottom of the trench to contact the first conductive layer, the via layer including a protrusion protruding to a height greater than a height of the trench; a barrier layer selectively on the bottom and sidewalls of the trench and on sidewalls of the via layer in the trench; a cap layer on a surface of the via layer; and a second conductive layer in the trench on the barrier layer. The cap layer is electrically connected to the first conductive layer through the via layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.