Ferroelectric based transistors
US11398568B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2020 |
| Grant date | Jul 26, 2022 |
| Priority date | — |
| Expiry date | Jun 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
The present disclosure relates to semiconductor structures and, more particularly, to ferroelectric based transistors and methods of manufacture. The ferroelectric based transistor includes: a semiconductor-on-insulator substrate including a semiconductor material, a buried insulator layer under the semiconductor material and a substrate material under the semiconductor channel material; a ferroelectric capacitor under the buried insulator layer and which includes a bottom electrode, a top electrode and a ferroelectric material between the bottom electrode and the top electrode; a gate stack over the semiconductor material; a first terminal contact connecting to the bottom electrode of the ferroelectric capacitor; and a second terminal contact connecting to the top electrode of the ferroelectric capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.