Polishing pad, process for preparing the same, and process for preparing a semiconductor device using the same
US11400559B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Aug 25, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
The polishing pad according to an embodiment adjusts the content of elements present in the polishing layer, thereby controlling the bonding strength between the polishing pad and the polishing particles and enhancing the bonding strength between the polishing particles and the semiconductor substrate (or wafer), resulting in an increase in the polishing rate. It is possible to enhance not only the mechanical properties of the polishing pad such as hardness, tensile strength, elongation, and modulus, but also the polishing rate for both a tungsten layer or an oxide layer. Accordingly, it is possible to efficiently fabricate a semiconductor device of excellent quality using the polishing pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.