Signal analyzer and method of analyzing a signal
US11402430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2020 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Jan 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1215
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal analyzer for analyzing a signal includes a frontend with at least two interleaved digitizers configured to digitize an input signal, thereby generating a digitized input signal. The signal analyzer also includes a first interleave alignment filter established by a hardware interleave alignment filter that is configured to hardware-compensate non-ideal effects of the frontend in the digitized input signal in real-time, thereby generating a hardware-compensated, digitized input signal. Further, the signal analyzer includes an acquisition memory configured to store the hardware-compensated, digitized input signal, thereby acquiring an acquired signal. Moreover, the signal analyzer includes a second interleave alignment filter configured to fine-compensate further non-ideal effects of the frontend in a post-processing of the acquired signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.