Multiple read and write port memory
US11403173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2017 |
| Grant date | Aug 2, 2022 |
| Priority date | — |
| Expiry date | Oct 9, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes content banks configured to store content data and parity banks configured to store parity data for reconstructing the content data. In response to receiving, in a first clock cycle, a first request requesting a first operation to be performed in a first content bank and a second request requesting to write new content data to the first content bank, the memory device performs the first operation in the first content bank, and writes the new content data to a second content bank. The second content bank is selected from a subset of content banks defined by content banks that correspond with parity banks different from parity banks that correspond with the first content bank. The memory device updates, based on the new content data written to the second content bank, parity data in the parity banks that correspond with the second content bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.